The present invention relates to a parallel computer system and a method and computer program for use in the parallel computer system which includes one processing unit divisible into a plurality of logical processing units and a connecting device shared by these logical processing units. More particularly, the present invention relates to a parallel computer system and a block transfer method and computer program for use with the parallel computer system, whereby a plurality of commands or acknowledgements to be sent from a connecting device to logical processing units included in the parallel computer system and vice versa are edited into a single command or a single acknowledgement to be transferred therebetween.
In a typical parallel computer system described illustratively in Japanese Patent Laid-Open No. Hei 6-4490, "Data Processing System," (corresponding to European Patent application No. EP0563623A2) a plurality of processing units (called the "central processing complex" in the cited reference) are connected to a connecting device via dedicated a channel (called the "IS channel" in the cited reference). Data shared between the processing units are retained in a memory arrangement called a cache or list structure inside the connecting device, whereby the processing units are operated in parallel.
When one of the processing units updates the cache in the connecting device, the connecting device transmits a mutual invalidation command to the processing unit in question. When a processing unit updates the list in the connecting device so that a transition takes place from blank to filled state or vice versa in the list, the connecting device transmits a list notification command to the processing unit in question.
There is a specific case in which, as depicted in FIG. 26 of Japanese Patent Laid-Open No. Hei 6-83781, "Method for Managing Data Objects Used by a Local Processing Complex to Retain Shared Data Status Information," (corresponding to U.S. Pat. No. 5,388,266) the processing unit is divided into a plurality of logical processing units (called "images" in the cited reference) connected by a connecting device. In that case, the connecting device transmits a mutual invalidation (XI) command to each of the local processing units as needed.
In the parallel computer system in which the processing unit is divided into a plurality of logical processing units connected by the connecting unit, the connecting unit transmits commands or acknowledgements to these logical processing units and vice versa. In such transmitting operations, all commands or acknowledgements pass through the same channel. One disadvantage of this setup is that the channel is so often occupied by the transmitted commands or acknowledgements that other processing may be adversely affected thereby.